1. Field of the Invention
The present invention relates to a drive circuit and, more particularly, to a high-speed and high-efficiency drive circuit for driving a switching element.
2. Description of the Related Art
FIG. 1 is a detailed circuit diagram showing a conventional drive circuit 10 for a switching element. The drive circuit 10 applies a drive voltage VO through an output terminal OUT to a switching element (not shown) to be driven. For example, the switching element may be implemented by an NMOS transistor or a PMOS transistor.
Referring to FIG. 1, when a control voltage VIN is at a low level state, a transistor Q1 is turned on and then supplies a current to a base electrode of a transistor Q3. As a result, the drive voltage VO is pulled up to become approximately equal to a supply voltage source Vcc minus a collector-emitter saturation voltage VCE,sat(Q3) of the transistor Q3, i.e., VCC−VCE,sat(Q3). If at this moment the drive voltage VO is applied to a gate electrode of an NMOS switching element, then the NMOS switching element can be turned on. When the control voltage VIN is at a high level state, a transistor Q2 is turned on and then supplies a current to a base electrode of a transistor A4. As a result, the drive voltage QO is pushed down to become approximately equal to a collector-emitter saturation voltage VCE,sat(Q4) of the transistor Q4. If at this moment the drive voltage VO is applied to a gate electrode of an NMOS switching element, then the NMOS switching element can be turned off.
In order to provide a drive circuit with a higher operational speed and a better operational efficiency, a few of techniques and circuitry have already be developed and disclosed, for example, in U.S. Pat. No. 5,939,907 and U.S. Pat. No. 6,130,575, each of which is fully incorporated herein by reference.